SALLY on a Breadboard

[UNIXcoffee928]

This thread is for describing methods of accurately reverse-engineering the SALLY 6502, so that it may first be described & documented on a breadboard, and then, may be used to facilitate a model that can be used in a FPGA description language.

 

There already are 6502 FPGA implementations, please do your research first, and be careful of Intellectual Property (IP) violations.

 

Also remember that SALLY is slightly different than a standard 6502.

 

 

This idea came to life in the "Atari on a Breadboard" thread, but will be treated as a separate concept, to keep the threads from becoming distracting & cluttered.

 

Here are the links to all related threads in this "Brute Force Initiative":

 

- Atari on a Breadboard

- POKEY on a Breadboard

- ANTIC on a Breadboard

- SALLY on a Breadboard

- GTIA on a Breadboard

- PIA on a Breadboard

 

=========================================================
SALLY/6502
=========================================================
           _________
          |   | |   |
          |    -    |
01. Vss   -| 01   40 |- 40. RST
02. RDY   -| 02   39 |- 39. Ø2
03. Ø1    -| 03   38 |- 38. SO
04. IRQ   -| 04   37 |- 37. Ø0
05.       -| 05   36 |- 36. R/W
06. NMI   -| 06   35 |- 35. HALT
07. SYNC  -| 07   34 |- 34. 
08. Vcc   -| 08   33 |- 33. D0
09. A0    -| 09   32 |- 32. D1
10. A1    -| 10   31 |- 31. D2
11. A2    -| 11   30 |- 30. D3
12. A3    -| 12   29 |- 29. D4
13. A4    -| 13   28 |- 28. D5
14. A5    -| 14   27 |- 27. D6
15. A6    -| 15   26 |- 26. D7
16. A7    -| 16   25 |- 25. A15
17. A8    -| 17   24 |- 24. A14
18. A9    -| 18   23 |- 23. A13
19. A10   -| 19   22 |- 22. A12
20. A11   -| 20   21 |- 21. Vss
          |_________|
          |  SALLY  |
          |_________|

 

=========================================================
SALLY (6502) (Pins run 0-20 on left & 40-21 on the right)
=========================================================
01. Vss:    Ground
02. RDY:    Memory ready signal
03. Ø1:     Clock out (inverted Ø2)
04. IRQ:    Interrupt request signal
05. 
06. NMI:    Non-maskable interrupt signal
07. SYNC:   (unknown)
08. Vcc:    +5V power
09. A0:     Memory addr bus  0
10. A1:     Memory addr bus  1
11. A2:     Memory addr bus  2
12. A3:     Memory addr bus  3
13. A4:     Memory addr bus  4
14. A5:     Memory addr bus  5
15. A6:     Memory addr bus  6
16. A7:     Memory addr bus  7
17. A8:     Memory addr bus  8
18. A9:     Memory addr bus  9
19. A10:    Memory addr bus 10
20. A11:    Memory addr bus 11
21. Vss:    Ground
22. A12:    Memory addr bus 12
23. A13:    Memory addr bus 13
24. A14:    Memory addr bus 14
25. A15:    Memory addr bus 15
26. D7:     Memory data bus  7
27. D6:     Memory data bus  6
28. D5:     Memory data bus  5
29. D4:     Memory data bus  4
30. D3:     Memory data bus  3
31. D2:     Memory data bus  2
32. D1:     Memory data bus  1
33. D0:     Memory data bus  0
34. 
35. HALT:   Halts the CPU
36. R/W:    Read/write direction
37. Ø0:     Clock in
38. SO:     Set Overflow flag
39. Ø2:     Sync / Clock out
40. RST:    Resets the CPU

 

 

Welcome Aboard

 

Edited November 5, 2008 by UNIXcoffee928

[perry_m]

Some C64 people discussed here:

http://noname.c64.org/csdb/forums/?roomid=...;showallposts=1

a blog post here:

http://www.pagetable.com/?p=39

which explains some 6502 internals not explained elsewhere.

There was a link from that site to here: (in Hungarian)

http://impulzus.sch.bme.hu/6502/letolt.php3

And a partial English translation:

http://www.downloads.reactivemicro.com/Pub...%20Engineering/

 

The Hungarian site has PostScript files of a full, transistor-level reverse engineering of the 6502 chip.

(edit: I found a better pdf of it here, with all pages combined:) http://www.downloads.reactivemicro.com/Pub...lectronics/CPU/

 

The 6502 was decapsulated and its surface photographed at high resolution.

The partial English translation explains how to read the schematics back from such a photograph.

There are also scans of a 286, 8255 and Pic16f84 on that site.

 

Since this method is now publically documented, if someone could get photographs of ANTIC, POKEY and GTIA, we could probably use this method to reverse engineer them.

 

The MAME people have been using decap photographs to extract mask ROMs

http://www.mameworld.net/gurudumps/decap/index.html

It says the cost for each chip is about $330.

Edited November 7, 2008 by perry_m

[ClausB]

The Hungarian site has PostScript files of a full, transistor-level reverse engineering of the 6502 chip.

 

The 6502 was decapsulated and its surface photographed at high resolution.

Cool stuff!

[+Stephen]

wnloads.reactivemicro.com/Public/Electronics/CPU/"]http://www.downloads.reactivemicro.com/Pub...lectronics/CPU/[/url]

 

The 6502 was decapsulated and its surface photographed at high resolution.

The partial English translation explains how to read the schematics back from such a photograph.

There are also scans of a 286, 8255 and Pic16f84 on that site.

 

Since this method is now publically documented, if someone could get photographs of ANTIC, POKEY and GTIA, we could probably use this method to reverse engineer them.

 

The MAME people have been using decap photographs to extract mask ROMs

http://www.mameworld.net/gurudumps/decap/index.html

It says the cost for each chip is about $330.

 

Fascinating stuff! I have looked at the 6502 stuff. I pledge $330 to decipher any one of the LSI chips in the 8-bit line. No BS. Three more volunteers, and we are set.

 

Stephen Anderson

[jacobus]

Please tell me people aren't reading these by hand - surely there is an OCR derivative that would work...

 

 

The 6502 was decapsulated and its surface photographed at high resolution.

The partial English translation explains how to read the schematics back from such a photograph.

There are also scans of a 286, 8255 and Pic16f84 on that site.

 

Since this method is now publically documented, if someone could get photographs of ANTIC, POKEY and GTIA, we could probably use this method to reverse engineer them.

 

The MAME people have been using decap photographs to extract mask ROMs

http://www.mameworld.net/gurudumps/decap/index.html

It says the cost for each chip is about $330.

[UNIXcoffee928]

Some C64 people discussed here:

http://noname.c64.org/csdb/forums/?roomid=...;showallposts=1

a blog post here:

http://www.pagetable.com/?p=39

which explains some 6502 internals not explained elsewhere.

There was a link from that site to here: (in Hungarian)

http://impulzus.sch.bme.hu/6502/letolt.php3

And a partial English translation:

http://www.downloads.reactivemicro.com/Pub...%20Engineering/

 

The Hungarian site has PostScript files of a full, transistor-level reverse engineering of the 6502 chip.

(edit: I found a better pdf of it here, with all pages combined:) http://www.downloads.reactivemicro.com/Pub...lectronics/CPU/

 

The 6502 was decapsulated and its surface photographed at high resolution.

The partial English translation explains how to read the schematics back from such a photograph.

There are also scans of a 286, 8255 and Pic16f84 on that site.

 

Since this method is now publically documented, if someone could get photographs of ANTIC, POKEY and GTIA, we could probably use this method to reverse engineer them.

 

The MAME people have been using decap photographs to extract mask ROMs

http://www.mameworld.net/gurudumps/decap/index.html

It says the cost for each chip is about $330.

 

Wow! That's some extremely impressive stuff!

 

It would be nice to have the ROM Dump Guru here, I love his PR & support style! If only more people were that "No-Nonsense" and displayed such a "Zero Tolerance for Jerks"... (could I be referring to a scenario involving "Cheese on a Breadboard"?... ha).

 

Anyway, thanks for those links!

[+remowilliams]

The MAME people have been using decap photographs to extract mask ROMs

That decap process is wild!

[sup8pdct]

Wasn't there once a project to do the entire custom chip lineup in a FPGA or something like that? Anyone know if that project has stalled?

That decaping looks good. If it would help the above project, or a new one along similar lines, I would vote for it 10 times.

 

James

[re-atari]

This thread is for describing methods of accurately reverse-engineering the SALLY 6502, so that it may first be described & documented on a breadboard, and then, may be used to facilitate a model that can be used in a FPGA description language.

A few years ago I came across http://freenet-homepage.de/dieter.02/m02.htm , where Dieter Mueller describes how he reverse engineered a 6502 using standard 74LS, eproms and an Sram. It might just be a good starting point for your efforts to recreate the 6502C.

 

Also remember that SALLY is slightly different than a standard 6502.

You can probably assess the differences between the 6502 and the 6502C by comparing the 800's (uses a standard 6502) schematics with the ones for the XL.

 

This idea came to life in the "Atari on a Breadboard" thread, but will be treated as a separate concept, to keep the threads from becoming distracting & cluttered.

To me, veroboarding an A8 only makes sense if you're planning to greatly enhance/expand the hardware (while maintaining backward compatibility), similar to Georg Braun's design of the Amiga 1000 based GB 1000. Take a look at http://www.gb97816.homepage.t-online.de/a1kboard.htm

 

re-atari

[sl0re]

To me, veroboarding an A8 only makes sense if you're planning to greatly enhance/expand the hardware (while maintaining backward compatibility), similar to Georg Braun's design of the Amiga 1000 based GB 1000. Take a look at http://www.gb97816.homepage.t-online.de/a1kboard.htm

 

re-atari

 

I agree, FPGA versions of the custom chips would not have to be run at the stock mhz. We could finally have our full 14 mhz 816 atari (or maybe even higher)... doubling up with dual pokeys, dual antics, et cetera... wouldn't be much more work.

Edited January 4, 2009 by sl0re

[sl0re]

wnloads.reactivemicro.com/Public/Electronics/CPU/"]http://www.downloads.reactivemicro.com/Pub...lectronics/CPU/[/url]

 

The 6502 was decapsulated and its surface photographed at high resolution.

The partial English translation explains how to read the schematics back from such a photograph.

There are also scans of a 286, 8255 and Pic16f84 on that site.

 

Since this method is now publically documented, if someone could get photographs of ANTIC, POKEY and GTIA, we could probably use this method to reverse engineer them.

 

The MAME people have been using decap photographs to extract mask ROMs

http://www.mameworld.net/gurudumps/decap/index.html

It says the cost for each chip is about $330.

 

Fascinating stuff! I have looked at the 6502 stuff. I pledge $330 to decipher any one of the LSI chips in the 8-bit line. No BS. Three more volunteers, and we are set.

 

Stephen Anderson

 

I'll pledge for Antic.