5 replies to this topic

[eshu]

Hi,

I'm just playing around with some code at the moment, but the stack is confusing me a bit....At the start of my code I'm doing:

LDX #0
TXS
LDA #0
PHA x 12

Then later I have
PLA x 12

But the last PLA isn't pulling the data at $FF it's pulling the value of #$40 and I can't for the life of me work out where it's coming from??? I've probably missed something obvious - anyone have any idea?

[GroovyBee]

eshu, on Thu Nov 26, 2009 9:28 AM, said:

LDX #0

This should be :-

LDX #$FF

Quote

PHA x 12

The "PHA" instruction pushes the contents of the Accumulator into the location pointed to by the stack pointer and then decrements the stack pointer. So the stack is decremented after the push and not before. In your code you would be writing to TIA register VSYNC with the first PHA and last PLA would read from TIA reguster CXM0P.

[eshu]

GroovyBee, on Thu Nov 26, 2009 9:40 AM, said:

eshu, on Thu Nov 26, 2009 9:28 AM, said:

LDX #0

This should be :-

LDX #$FF

Quote

PHA x 12

The "PHA" instruction pushes the contents of the Accumulator into the location pointed to by the stack pointer and then decrements the stack pointer. So the stack is decremented after the push and not before. In your code you would be writing to TIA register VSYNC with the first PHA and last PLA would read from TIA reguster CXM0P.

Thanks GroovyBee,

I thought it would be that, I guess this page is wrong:
http://www.cyberroac...2/boot_camp.htm

I was hoping to do:
TSX
BEQ EndLoop

Once everything was pulled from the stack, I guess I'll have to rethink that now....

Edited by eshu, Thu Nov 26, 2009 10:23 AM.

[GroovyBee]

eshu, on Thu Nov 26, 2009 9:53 AM, said:

Thanks GroovyBee,

No problem, I'm happy to help.

Quote

I thought it would be that, I guess this page is wrong:
http://www.cyberroac...2/boot_camp.htm

Some of the 6502 books I have get the sequence of events wrong too. Confusingly one book I have (6502 Reference Guide) gets the PLA sequence wrong in chapter 4 (which is a brief overview of instructions) and then correct in chapter 5 (detailed instruction description). I'd recommend that you find yourself a real 6502 datasheet (from a silicon manufacturer) for the low down on the instructions.

[eshu]

GroovyBee, on Thu Nov 26, 2009 11:27 AM, said:

eshu, on Thu Nov 26, 2009 9:53 AM, said:

Thanks GroovyBee,

No problem, I'm happy to help.

Quote

I thought it would be that, I guess this page is wrong:
http://www.cyberroac...2/boot_camp.htm

Some of the 6502 books I have get the sequence of events wrong too. Confusingly one book I have (6502 Reference Guide) gets the PLA sequence wrong in chapter 4 (which is a brief overview of instructions) and then correct in chapter 5 (detailed instruction description). I'd recommend that you find yourself a real 6502 datasheet (from a silicon manufacturer) for the low down on the instructions.

I have a nice book called "Programming the 6502" by Rodney Zaks, that was still sitting on the bookshelf of my old room at my parents house, after about 15 years gathering dust - I haven't spotted any errors in this yet - I usually use this in conjunction with http://www.6502.org/...502opcodes.html but that list has the cycle count for AND zp,X wrong which caused me a load of grief at one point

The one thing I really struggle for is a definitive list of stable illegal/undocumented opcodes, I use http://members.chell...ga/illopc31.txt and http://nesdev.parodi...nstructions.txt - but i'm not 100% sure on what is considered stable on the 2600 in all it's varieties. I use SAX and LAX and i'm pretty sure these are considered stable, and I know DCP is used by quite a few people. The ATX/OAL/LXA opcode would be really handy to me, but I think from http://www.biglist.c...1/msg00244.html that it is unstable

I got confused about the SP, possibly because the description of it is wrong in a few sources by the sound of it - and that article was the first concrete example I had found and I wanted it to be right because TSX, BEQ would save me two cycles in a kernel loop which i'm struggling to keep down to few enough cycles I can still sort of use it I think but I'll have to pull CXM0P0 on the last run of the loop which will probably squeeze me for cycles elsewhere, but that's all part of the challange I guess...

[GroovyBee]

eshu, on Thu Nov 26, 2009 1:51 PM, said:

I have a nice book called "Programming the 6502" by Rodney Zaks, that was still sitting on the bookshelf of my old room at my parents house, after about 15 years gathering dust - I haven't spotted any errors in this yet

The PLA and PLP sequences are wrong in my copy of that book.

Quote

- I usually use this in conjunction with http://www.6502.org/...502opcodes.html but that list has the cycle count for AND zp,X wrong which caused me a load of grief at one point

A scanned in PDF datasheet would be a better reference. It avoids any OCR or cut/paste problems.

Quote

I got confused about the SP, possibly because the description of it is wrong in a few sources by the sound of it - and that article was the first concrete example I had found and I wanted it to be right because TSX, BEQ would save me two cycles in a kernel loop which i'm struggling to keep down to few enough cycles I can still sort of use it I think but I'll have to pull CXM0P0 on the last run of the loop which will probably squeeze me for cycles elsewhere, but that's all part of the challange I guess...

If you posted your inner loop here the 6502 gurus might be able to shave some cycles from it.