Its great to be back here and to start coding again.
I have come up with a neat interlaced routine (not sure if something similar has been posted) and
I need to flip a single bit on and off every frame which sets the interlace routine to even/odd frames:
So what happens is during the kernal I manage it all like this:
ldy Scanlines ;[]+3 ;Our Scanline count for our interlaced loops
;-Loaded from VBLANK to save precious playfield cycles
PF_LOOP: tya ;[3]+2 ;Interlace frame check
eor #1 ;[5]+2 ;Toggle bit, this switches between Draw & Logic scanlines
and #$01 ;[7]+2 ;Mask all but bit 1
beq PF_LOGIC ;[9]+2/3 ;Branch to Logic scanline
PF_DRAW: ;********************************
; [DRAW SCANLINE]
; * 96 Scanlines of visible graphics
; * Scanline [??], S.cyc [11]
; * PixelPos [-35], Color clock [33]
;********************************
;***DO STUFF like draw graphics
jmp PF_Return ;[]+3 ;Jump out of Draw
PF_LOGIC: ;********************************
; [LOGIC]
; * 96 scanlines for logic
; * Scanline [39 to ??], S.cyc [12]
; * PixelPos [-32], Color clock [36]
;********************************
;***DO STUFF LIKE
;***Blank out graphics so they are not visible on this scanline
;***Process updates ect
;-Fall through to PF_Return
PF_Return: dey ;Decrement scanline
sta WSYNC ;-
bne PF_LOOP ;If more scanlines left, loop
;All done? Fall through to overscan
And in the Overscan I do this:
;***Interlaced display settings***
lda Interlace ;This will interlace the display
eor #1 ;-toggle bit between 0 and 1
sta Interlace ;-store value for next pass
bne .ODD ;-if its a 1 then setup for ODD frames
lda #191 ;Set to 192 scanlines total (191 to 0)
sta Scanlines ;-used during PF_LOOP
lda #33 ;Compensate 1 more scanline for interlace
sta TIM64T ;Will total 262 scanlines
jmp .OS_LOGIC ;Proceed to Overscan logic
.ODD: lda #192 ;We want 193 scanlines (192 to 0)
sta Scanlines ;-store value for next pass
lda #34 ;Compensate 1 less scanline for interlace
sta TIM64T ;Will total 262 scanlines
;-proceed to Overscan logic
Is this a typical way of doing an interlaced kernal? Every frame is alternated starting at Logic->Draw to Draw->Logic and so forth, I find this gives minimal flicker and allows for an entire frames worth of time for logic and drawing collectively.
What I would like to know is if someone invented a better way to do interlaced kernals. This seems to work fine right now for my game, but I am very curious as to what others have done before me.
Okay sleep time, cya all tomorrow.
Edited by ScumSoft, Wed Mar 2, 2011 5:50 AM.















