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"Bus stuffing" like The Graduate.


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#1 kskunk OFFLINE  

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Posted Tue Jun 7, 2011 12:32 AM

Hi guys,

Thanks to Curt's great archiving work, we have the designer's notes on The Graduate peripheral for the 2600:
http://www.atarimuse...2600/a3000.html

They invented a 3-cycle "Bus Stuff" mode, to achieve an even faster TIA register update rate than the Harmony's 5-cycle/DPC+ "Fast Fetch" mode.

This works by loading Y with $FF at the beginning of the kernel, and then having the 6507 execute 3-cycle STY $REG instructions. At the critical moment when the $FF is being written, The Graduate hardware steps in and overdrives the the desired value on the bus. This avoids the extra 2-cycle LDA $VALUE used by Harmony.

Even though it seems pretty evil to overdrive the 6507's bus, the designers knew it was fairly safe because the NMOS 6507 used pull-up resistors to drive 1s on the bus, which could be grounded to 0s without overheating the 6507.

I'm sure this technique has been discussed before, but I couldn't find any actual hardware that could do it.

Has anyone tried "bus stuffing"? Can the Harmony do it, or are there resistors in the way?

- KS

#2 batari OFFLINE  

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Posted Tue Jun 7, 2011 1:45 AM

View Postkskunk, on Tue Jun 7, 2011 12:32 AM, said:

Hi guys,

Thanks to Curt's great archiving work, we have the designer's notes on The Graduate peripheral for the 2600:
http://www.atarimuse...2600/a3000.html

They invented a 3-cycle "Bus Stuff" mode, to achieve an even faster TIA register update rate than the Harmony's 5-cycle/DPC+ "Fast Fetch" mode.

This works by loading Y with $FF at the beginning of the kernel, and then having the 6507 execute 3-cycle STY $REG instructions. At the critical moment when the $FF is being written, The Graduate hardware steps in and overdrives the the desired value on the bus. This avoids the extra 2-cycle LDA $VALUE used by Harmony.

Even though it seems pretty evil to overdrive the 6507's bus, the designers knew it was fairly safe because the NMOS 6507 used pull-up resistors to drive 1s on the bus, which could be grounded to 0s without overheating the 6507.

I'm sure this technique has been discussed before, but I couldn't find any actual hardware that could do it.

Has anyone tried "bus stuffing"? Can the Harmony do it, or are there resistors in the way?

- KS
The Harmony can do this, and we have talked about in the past. Some of the conversations are private so I can't provide links, but I will mention some of the things we talked about.

Anyway, the 6507 uses transistors rather than resistors to drive high. I understand they are fairly weak, but it's not clear how weak exactly. While it seems that the 6507 survives just fine with occasional bus contention, I'm not sure how well it would fare with bus contention on every third cycle. It wouldn't be too hard to test this - I could just create a simple routine that stuffed zeros every third cycle and had an occasional JMP to keep the PC from running off the edge of cart space, and run it for a while and see how hot things get. I didn't see any test results from the Graduate pdf that Curt posted, and while it's likely they did testing and were satisfied with the results, it's also possible that the Graduate prototypes fried some CPUs and that may have led to its failure.

#3 kskunk OFFLINE  

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Posted Tue Jun 7, 2011 5:21 PM

View Postbatari, on Tue Jun 7, 2011 1:45 AM, said:

The Harmony can do this, and we have talked about in the past.
Has anyone tried it?

Quote

Anyway, the 6507 uses transistors rather than resistors to drive high. I understand they are fairly weak, but it's not clear how weak exactly.
Right, sorry for oversimplifying it. The usual circuit design in NMOS uses a single depletion mode transistor per net, to pull the net up to 5V if it is otherwise floating. Any of the enhancement mode transistors on the same net can safely pull the net down to ground without straining the depletion mode pull-up.

I'm curious how much The Graduate designers knew. Were they being reckless? Or did they know the structure of the 6507 output driver? If it is designed with a depletion mode pull-up, then their design should be perfectly safe. Just adding another (open-collector) driver off-chip would be no different than using the on-chip one.

Maybe I should ask the Visual 6502 guys what the output drivers look like. In NMOS, you can build a push-pull driver with enhancement mode transistors on the high side. This would not be as happy being switched off. You would be able to see that on a scope because the logic 1s would be closer to 4V than 5V.

Quote

It's also possible that the Graduate prototypes fried some CPUs and that may have led to its failure.
Yeah, that would put a quick end to the approach. :(

- KS

Edited by kskunk, Tue Jun 7, 2011 6:12 PM.


#4 batari OFFLINE  

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Posted Tue Jun 7, 2011 8:16 PM

View Postkskunk, on Tue Jun 7, 2011 5:21 PM, said:

View Postbatari, on Tue Jun 7, 2011 1:45 AM, said:

The Harmony can do this, and we have talked about in the past.
Has anyone tried it?

Quote

Anyway, the 6507 uses transistors rather than resistors to drive high. I understand they are fairly weak, but it's not clear how weak exactly.
Right, sorry for oversimplifying it. The usual circuit design in NMOS uses a single depletion mode transistor per net, to pull the net up to 5V if it is otherwise floating. Any of the enhancement mode transistors on the same net can safely pull the net down to ground without straining the depletion mode pull-up.

I'm curious how much The Graduate designers knew. Were they being reckless? Or did they know the structure of the 6507 output driver? If it is designed with a depletion mode pull-up, then their design should be perfectly safe. Just adding another (open-collector) driver off-chip would be no different than using the on-chip one.

Maybe I should ask the Visual 6502 guys what the output drivers look like. In NMOS, you can build a push-pull driver with enhancement mode transistors on the high side. This would not be as happy being switched off. You would be able to see that on a scope because the logic 1s would be closer to 4V than 5V.

Quote

It's also possible that the Graduate prototypes fried some CPUs and that may have led to its failure.
Yeah, that would put a quick end to the approach. :(

- KS
Yes, the Visual 6502 guys would probably know.

I am guessing the output drivers are weak from the datasheet. I believe each data line is rated to source 100uA at 2.4v and can sink around 2mA at around 0.5v. This suggests the output drivers have fairly low impedance and might survive being overdriven.

I have never tried it but I will look into it later. I think all I will do is modify the basic 4k scheme to drive the bus if it encounters a write to $49 (which is COLUBK, so I can see the results on the screen) and force varying values on the bus (though mostly with bits cleared to maximize the stress) and let it run for a while, and measure the temperature of the 6507 with my infrared thermometer and compare with a control running a regular game.

#5 kskunk OFFLINE  

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Posted Tue Jun 7, 2011 9:43 PM

View Postbatari, on Tue Jun 7, 2011 8:16 PM, said:

I have never tried it but I will look into it later. I think all I will do is modify the basic 4k scheme to drive the bus if it encounters a write to $49 (which is COLUBK, so I can see the results on the screen) and force varying values on the bus (though mostly with bits cleared to maximize the stress) and let it run for a while, and measure the temperature of the 6507 with my infrared thermometer and compare with a control running a regular game.
Sounds like a fascinating test. I assume it's not too hard to make Harmony drive the bus in open-collector/open-drain mode during the experiment. Accidentally driving a 1 against the 6507's 0 would definitely heat up something.

If it's enough to make the chip hot, it will show up on a bench top power supply as an increased current draw as well.

- KS

Edited by kskunk, Tue Jun 7, 2011 9:47 PM.


#6 batari OFFLINE  

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Posted Tue Jun 7, 2011 11:53 PM

View Postkskunk, on Tue Jun 7, 2011 9:43 PM, said:

View Postbatari, on Tue Jun 7, 2011 8:16 PM, said:

I have never tried it but I will look into it later. I think all I will do is modify the basic 4k scheme to drive the bus if it encounters a write to $49 (which is COLUBK, so I can see the results on the screen) and force varying values on the bus (though mostly with bits cleared to maximize the stress) and let it run for a while, and measure the temperature of the 6507 with my infrared thermometer and compare with a control running a regular game.
Sounds like a fascinating test. I assume it's not too hard to make Harmony drive the bus in open-collector/open-drain mode during the experiment. Accidentally driving a 1 against the 6507's 0 would definitely heat up something.

If it's enough to make the chip hot, it will show up on a bench top power supply as an increased current draw as well.

- KS
Well, bus stuffing does seem to work. I modified the 4k to stuff zeros every time COLUBK is written and I programmed a few games, and each time the background comes up black when it's supposed to be another color. Currently running the control game while I work up a binary that will stuff zeros every third cycle.

#7 batari OFFLINE  

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Posted Wed Jun 8, 2011 12:43 AM

OK, here's the results after 15 minutes of running. The temperature on the 6507 wasn't constant across the chip, so I measured the hottest temp I found (close to the notch end of the chip.)

Control game (Asteroids):
6507 before: 25.1 C 6507 After: 48.9 C
Harmony MCU before: 23.3 C Harmony MCU after: 26.3 C

Bus stuffing:
6507 before: 25.5 C 6507 After: 51.1 C
Harmony MCU before: 23.0 C Harmony MCU after: 30.8 C

It's worth noting that bus stuffing seems to work, even every third cycle. The binary does a clean start, a LDA #$FF, then a loop that does 100 bus-stuffed STA COLUBK writes in a row, followed by an INY/STY COLUBK (which is not bus-stuffed) so you can see something on the screen to know the code is still running. The binary never failed, and properly shows a black background where expected.

I will keep it running until I go to bed and see if it eventually levels off (as I'm typing, 6507 is 53.8 C, Harmony is 34 C) then do a long-term test of Asteroids again.

So far, the difference seems pretty insignificant and should be well within the limits of these chips.

#8 batari OFFLINE  

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Posted Wed Jun 8, 2011 1:26 AM

Looks like the temp leveled off after running each game for about a half hour. I also think the room has cooled down a bit as the "bus stuffing" temp went down.

So Asteroids vs. bus stuffing now stands at 51.5 C vs 52.4 C. The Harmony temperature is 32.8 C vs. 32.5 C. So, I don't think there is a significant difference, and perhaps bus stuffing is safe. I will let a console bus-stuff for a few days before I say for sure, though.

#9 JAC! OFFLINE  

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Posted Wed Jun 8, 2011 4:53 PM

Hey, this idea is really cool. 3 cycles resolution ;-) I also think the NMOS chips will be able to cope with it. If the outside transistor provides sufficient power to drive the pin low without heating up it will be stable. There also was Atari XL hardware like TurboFreezer which used the same method to implicitly drive signals in the machine via "outbound" pin on the peripherials connector.

#10 supercat OFFLINE  

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Posted Thu Jun 9, 2011 7:15 PM

View Postbatari, on Tue Jun 7, 2011 8:16 PM, said:

Right, sorry for oversimplifying it. The usual circuit design in NMOS uses a single depletion mode transistor per net, to pull the net up to 5V if it is otherwise floating. Any of the enhancement mode transistors on the same net can safely pull the net down to ground without straining the depletion mode pull-up.

The 6502 data bus floats pretty well when it's not doing a memory write; the data bus pull-ups are at least somewhat active. That being said, your experiments would suggest that overdriving low's onto the bus is probably pretty safe. It might not be a bad idea to output "overdrive" bytes by storing zero in the data register and setting the output-enable register to the desired pattern. That would avoid accidentally trying to drive "1"'s on the bus. My first 2600jr I ever owned bit the dust when I misprogrammed a PLD in a cartridge and back-drove a high onto the address bus.

#11 batari OFFLINE  

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Posted Thu Jun 9, 2011 8:15 PM

View Postsupercat, on Thu Jun 9, 2011 7:15 PM, said:

View Postbatari, on Tue Jun 7, 2011 8:16 PM, said:

Right, sorry for oversimplifying it. The usual circuit design in NMOS uses a single depletion mode transistor per net, to pull the net up to 5V if it is otherwise floating. Any of the enhancement mode transistors on the same net can safely pull the net down to ground without straining the depletion mode pull-up.

The 6502 data bus floats pretty well when it's not doing a memory write; the data bus pull-ups are at least somewhat active. That being said, your experiments would suggest that overdriving low's onto the bus is probably pretty safe. It might not be a bad idea to output "overdrive" bytes by storing zero in the data register and setting the output-enable register to the desired pattern. That would avoid accidentally trying to drive "1"'s on the bus. My first 2600jr I ever owned bit the dust when I misprogrammed a PLD in a cartridge and back-drove a high onto the address bus.
If done right, there's no danger in driving a "1". When you want to stuff the bus, always place zeros on the data pins, but set some as input or output depending on the value you want. The output pins should force zeros while the input pins stay at whatever they were before, so you will never drive a 1.




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