110 replies to this topic

[Delicon]

Here is my flash cart. Hardware and software will be completely free. I have Kroko's blessings, so no killing me. Besides, his is better. Its faster, comes with a really nice interface, and you can load multicart images. This one has none of these things.

It will support 32K of flash and 32K of RAM. Most bankswitching will be supported. It will come in 2 variation. Both fit in a 2600 cart case. There will be a surface mount version (hard to solder) that will have a processor on board and a USB connection to a PC or Mac. There will also be a through hole version (easier to solder) that will not have a processor or interface on board. It will require an additional board that will connect to the PC. The down side of the through hole is that it will cost a couple bucks extra to make because it is in two pieces.

These are early pictures, first one is the cart without RAM installed. Second one is the cart, out of its case, plugged into my prototype programming board.

I have order boards for both versions and hope they will be final revision. Should be a couple weeks to get them in. After that, they are for everybody.

Oh, the best part, they will cost about $20 to $25 to make, one at a time. If you make multiple through hole carts, you will only need to make the extra programmer once. In that sense, the through hole could be cheaper.

Dont mind those silly white rings, I was just testing the quality of the circuit board manufacturers silkscreening process.

Keep your fingers crossed,

Vern

[Tsukasa]

That's awesome! Finally, a flash cart I can afford! What all comes with it? Are you going to sell it as a kit or completed? If I give you $25 do I get everything?

[Delicon]

I am not going to sell it. If you want one, you will have to make it. I will provide the part list, schematics, board layout, and software. You have to do the rest.

Vern

[Tsukasa]

Awww. I can't afford an Fpga programmer... I'll have to design my own flash cart....

You raised my hopes and destroyed them quite thuroughly. Good job.

[jeepnut24]

Sweet... But how am I going to get the board???

[Delicon]

Dont worry, you wont need an FPGA programmer. The processor will program the CPLD for you. The processor software is also upgradable.

If you want boards, you can order them from www.sparkfun.com. They are 2.50/sqin. Thats a great price and will only cost you a couple bucks to get the board made. Half of the $25 bucks really. Anyway, the files will be supplied, you just order and send them the zip. Dont worry.

If people got together and ordered a bunch of boards, they would be really cheap.

Vern

[5-11under]

This looks like a great little project. I'm looking forward to seeing the results.
Fingers crossed,
5-11under

[Delicon]

Sorry about the quality, but until I figure out how to host the actual files and not these pictures, this is what you get.

I cleaned up my schematic and board a bit, they could still use some work though.

This is an untested board, so I would not suggest making it yet. I have the board on order and will let you know how it turns out. This is an improvement over my last design by adding an oscillator to help with some of the trickier timing situations. I will supply more information, keep your pants on.

As you can see, this is a very simple design. Which also makes it a cheap design. Also, this cartridge requires another device to program it with a binary. I could not build it into the cartridge design and have it fit in a standard unmodified 2600 cartridge case. I will release that soon.

Parts list:

      Manu Part #       Description        DigiKey Part #       Price Each

U1    XC9572-15PC44C    Xilinx CPLD        122-1171-ND          $5.35

U2    CY62256LL-70PC    Cypress 32K SRAM   428-1080-ND          $4.25

U3    AT49F512-70JC     Atmel 64K Flash    AT49F512-70JC-ND     $2.04

Q1                      16MHz Oscillator   535-9171-5-ND        $1.63

C1-5                    0.1uF Ceramic Cap  BC1084CT-ND          $0.16

C6                      100pF Ceramic Cap  BC1013CT-ND          $0.13

[Delicon]

I forgot a couple parts, I ordered them from another vendor, sorry.

These are from Jameco, if you want the Digikey equivalent parts you will have to find it yourself. All three are the sockets for U1, U2, and U3.

Part #     Description               Price

112272CC   28 pin wide dip socket    $0.19

71811CC    32 pin PLCC socket        $0.55

71618CC    44 pin PLCC socket        $1.15

Vern

[Stingray]

Neat! Keep us updated!

-S

[Delicon]

I didnt know I could attach files to my post. If I had know that I wouldnt have posted those board pictures. Here are the real files.

The cartridge was designed with Cadsoft's Eagle Layout Editor. Its free for private and hobby use.

www.cadsoftusa.com

I also included a zip of the files you would need to send to a board house to have the boards made. There are many options available for board fabrication. My suggestions are:

www.pcb4u.com or www.sparkfun.com

If you use pcb4u the boards will cost you $10 each. The catch is you need to buy 5 of them. This is the least expensive option I have found anywhere for a board of this size.

The other option is sparkfun, they charge $2.50/sqin. 3.23in x 2.86in = 9.23insq. Thats $25 rounded up to the nearest sqin. Thats for one board.

I would suggest ordering together or selling off your extras and go with the pcb4u option. That way the cart actually does approach a total of $25 to make.

I would suggest holding off getting this board made. I have the board on order and it will be here next week. Let me run it through some paces first. There shouldnt be any problems as the changes werent that involved, but you never know. I will keep you informed.

I will post the programmer files tonight or tomorrow.

Vern

Attached Files

•  chimerajr20.zip   17.69K   79 downloads
•  boardhouse.zip   10.21K   74 downloads

[Stingray]

Delicon said:

 
I would suggest holding off getting this board made.  I have the board on order and it will be here next week.  Let me run it through some paces first.  There shouldnt be any problems as the changes werent that involved, but you never know.  I will keep you informed.

I look forward to hearing about your results.

-S

[pissant]

Do you have the CPLD source files also Delicon, or is that still a work-in-progress also?

Thanks

[Delicon]

2k, 4k, F8, F6, F4 are all finished and I am satisfied with them. They are all very simple too. So I decided to work on a SuperChip RAM module and thats when I run into some problems, every once in a while things would just go strange, real infrequent. I added an oscillator to help with more accurate timing. I was relying on gate timing earlier. As a whole, the design is asynchronous. The oscillator is only used for signal delay, not as a system clock. I dont see the cart as being very useful if it doesnt handle RAM, so let me test this new design, I will keep you informed. The boards should be shipping tomorrow (at least thats what the invoice says).

Sorry also about not getting a programmer design up, but the flu and a sinus infection have had me in bed for 4 days. I still have some documentation for some contract work to wrap up also. So, as soon as I possibly can, I will get the programmer up.

As far as the CPLD files go, you will need Xilinx's free CPLD and FPGA design software. Its available at thier website. I have designed these using logic schematics, so anybody should understand them.

I will start work on the more difficult bankswitching schemes once I am satisfied with the SuperChip RAM part. With any luck everything will at least be known by next Friday, if not available.

Vern

[pissant]

btw - anyone who doesn't have a xilinx fpga/cpld programmer cable can build one using these schematicd from Xilinx: http://toolbox.xilinx.com/docsan/2_1i/data...n/hug/fig13.htm

Its works fine, I've seen it in action.

The webpack software that Xilinx offers for free is available here:
http://www.xilinx.com/xlnx/xebiz/designRes...gcefldfhndfmo.0

(sorry for that long url)

[5-11under]

pissant said:

btw - anyone who doesn't have a xilinx fpga/cpld programmer cable can build one using these schematicd from Xilinx: http://toolbox.xilinx.com/docsan/2_1i/data...n/hug/fig13.htm

Its works fine, I've seen it in action.

BTW, according to the first post, Delicon is using a USB port.
5-11under

[Delicon]

5-11under said:

BTW, according to the first post, Delicon is using a USB port.
5-11under

Well, right and wrong. The surface mount version will have USB, the through hole design is normal RS232. Sorry, but there is no way I know of to get USB support with through hole components.

About the programmer, the one mentioned above does work, I use a very similar version. The good news is that it really doesnt matter. CPLD programming is taken care of for you, so dont fret.

Update coming soon, I have the boards in.

Vern

[5-11under]

Delicon said:

5-11under said:

BTW, according to the first post, Delicon is using a USB port.
5-11under

Well, right and wrong. The surface mount version will have USB, the through hole design is normal RS232. Sorry, but there is no way I know of to get USB support with through hole components.

About the programmer, the one mentioned above does work, I use a very similar version. The good news is that it really doesnt matter. CPLD programming is taken care of for you, so dont fret.

Update coming soon, I have the boards in.

Vern

Decisions, decisions. USB would be more fun, I think. Anyway, thanks for the update. I'm looking forward to seeing the USB schematic/information.
5-11under

[Delicon]

Success!! All appears to be functioning perfectly.

Dont use the files I posted above. I will post new revised versions. I need to make the center hole a hair larger, add an extra capacitor, and manually route the traces.

I am getting a little noise in the picture and am trying to find the source. Its not the oscillator, I took it out and tested. I think it may just be the terrible autorouting the software didnt. I am going to do a better job manually. If any one can think of any possible ways to combat some noise, let me know and I will give it a try.

New files tomorrow, I hope.

Vern

[Delicon]

Working bankswitch schemes: 2k, 4k, F8, F8 w/ SuperChip RAM, FA w/ CBS RAM, F6, F6 w/ SuperChip RAM.

Thats it for now. I want to test my F4, is there an NTSC F4 game?

3F and E0 coming tomorrow; Maybe E7, if I feel lucky.

Vern

[batari]

Quote

was relying on gate timing earlier. As a whole, the design is asynchronous. The oscillator is only used for signal delay, not as a system clock

I've been following this project because I fully intend to build one of these.

I don't think there's any need for an oscillator, you should be able to get the timing right with artificial gate delays. Maybe the HDL compiler is optimizing out the delays and violating the setup time of the RAM? Without seeing source, though, I have no way of knowing what's going on.

If you're using VHDL and you post source, I might be able to suggest something. But if you're using Verilog, you're on your own.

[Delicon]

I tried with gate delays. I couldnt get it to work. I am just learning VHDL, my designs are in a schematic form. I gave my delay gates the KEEP and NOREDUCE constrant, so they werent getting optimized out. The problem was also, using up too much of the CPLDs resources having gates do a 400ns delay. I will post the files tomorrow, I am tired. I look forward to your input.

Vern

[Delicon]

Here are the CPLD files for the bankswitching I mentioned above. I am not really sure how to distribute these, so I pretty much just zipped my project directory up. To look at and use the files, just Open Project the cpld.npl file with the Xilinx software.

Let me know what you think. More to come.

Vern

Attached Files

•  chimerajr_cpld.zip   72.77K   87 downloads

[Delicon]

Heres the general layout of the CPLD designs.

- Only of bankswitching type is loaded into CPLD at a time.



- Each design is made up of two and possibly three main parts.



     - A microcontroller interface - this is how the binaries get loaded into flash.



     - A bankswitching part - this does the address is converted based on bankswitch type.



     - An SRAM part - only if needed - handles SRAM functions.



- There is one unused pin on the 2600 cartridge header, I use this as a MODE pin.



     - If MODE = GND, then the cart is in the VCS, do things normally.



     - If MODE = VCC, the cart is in programmer, use microcontroller interface.



     - MODE is also used as the JTAG CLK for CPLD programming, this happens when MODE oscillates.



- The microcontroller interface is basically an SPI interface for loading the flash address.  Just a 16bit shift register.

I know its not a lot, but I hope it helps people sort the design out a little faster. Let me know if you have any questions or suggestions.

One other thing, forgot that there will be no 3F bankswitching on the through hole version. Not enough pins on the CPLD. The surface mount uses the same chip in a different package which has more pins. So I will up the flash to 64K and have 3F.

Vern

[batari]

I am not familiar with the format you have posted. However, I have access to a computer with various Xylinx tools, so maybe I'll open them up and see what happens.

Quote

there will be no 3F bankswitching

Really? According to Kevin Horton's bankswitching document, 3F can be implemented with a single chip - a 74LS173. I can't imagine that any TTL chip could be that complicated, but maybe I'm wrong.