Here's an idea I have for a generic 7800 cartridge, which should handle up to 144K ROM or 128K ROM and 16K RAM using a single 20V8 GAL for decoding. It will also take a 7402 chip in place of the GAL (with pin 1 in pin 1) to handle non-bankswitched ROM-only cartridges up to 48K by adding two jumpers. This is a really good idea, since 7402 chips are a lot cheaper than GAL chips, and you won't even need a GAL chip unless you need bankswitched ROM, RAM, or a POKEY.
Both 8K 6164 and 32K 61256 RAM chips will be supported. Normally only half of a 32K RAM will be used, but it should be possible to have a 16K ROM/32K RAM configuration.
It should have holes for a POKEY chip, which will be placed offset from the RAM holes, so that you can use either. It would also be nice to have holes to take both narrow and wide 16K RAMs, because I've found a lot of narrow 32K RAMs on old 486 motherboards. The pins, starting from the top, will be something like: RAM 28-15, POKEY 20-1 (yes, pointing the other way), narrow RAM 1-14, wide RAM 1-14, POKEY 21-40. If the GAL is vertical at a top corner, a second set of narrow RAM holes can be put just above the ROM chip (instead of the row of narrow RAM holes at the top) to allow a POKEY+RAM cartridge. Of course the ROM will have 32 holes.
It would be nice to only have have narrow RAM holes, but sometimes you want ROM in there (for 144K games), so there will still have to be holes for a wide RAM chip. (However, it may be possible to use another bank select address line and a 256K ROM for 144K games.)
When either POKEY, RAM, or the 78SC_LOW mapping (with bank N-1 at $4000-$7FFF) is used, the BA17 output will have to be used for a function other than bank select. When both POKEY and RAM are used, there are not enough outputs with a 20V8 GAL to use more than 64K of ROM. Upgrading to a 22V10 gives two more outputs, and should be able to support 512K ROM or 256 ROM+POKEY+RAM, though it might require some board modifications.
Another problem with POKEY+RAM is that more address lines are needed to split the address space. At the very least, pin 4 of the GAL will need to be connected to A12 for POKEY + 8K RAM. Since Commando and Ballblazer both access POKEY at $4000-$400F, it should be put in the $4000-$5FFF 8K range, with RAM at $6000-$7FFF. Wiring up more address pins to GAL inputs and programming a 20V8 GAL appropriately would allow at least 14K RAM with a POKEY.
For Rescue on Fractalus, there will need to be some rewiring of the address line A8 to RAM. Cutting it should probably be sufficient.
There are lots of options that could be made possible with more jumper points, but they would clutter an already tight board. The more common ones (most of the modes that the Cuttle Cart 2 supports, plus a 256K ROM mode) should be supported with the main jumpers. For the more "unique" combinations (32K RAM, POKEY+RAM, Fractalus), the board should be designed such that the traces that need to be cut can be done so with little trouble, along with a few new connections made with wire wrap wire, and possibly the use of a 22V10 GAL.
20V8 pinout: 1 LCI latch clock input (from pin 22) (7402 output) 2 CLK2 6502 phase 2 clock 3 RW 6502 read/!write control 4 --- connect via resistor to +5 volts (7402 output) 5 A14 6502 address A14 6 A15 6502 address A15 7 XGND (7402 ground; connect to ground) 8 D4 6502 data D4 (for 512K with 22V10) 9 D0 6502 data D2 10 D1 6502 data D1 11 D2 6502 data D0 12 GND 13 OE output enable (from pin 15) 14 D3 6502 data D3 15 OEO output enable out (to pin 13) to select bank 7 (or BA18/POKEY with 22V10) 16 BA17 bank select address A17 / POKEY select 17 BA16 bank select address A16 18 BA15 bank select address A15 19 BA14 bank select address A14 20 ROMCS ROM chip select (7402 output) 21 RAMCS RAM/POKEY chip select 22 LCO latch clock output (to pin 1) 23 --- connect via resistor to +5 volts (7402 output) 24 +5 * = bank switching method supported by CC2 *8K, 16K, 32K: 8K-32K ROM 2764/27128/27256 at 8000-FFFF use 7402 and wire jumpers across 7402 pins 6-19-18 or... OEO = 0 BA17 = unused BA16 = unused BA15 = unused BA14 = A14 -> ROM 29 (27) ROMCS = !A15 -> ROM 20/22 (22/24) RAMCS = unused LCO = unused 8K/8K, 16K/8K, 32K/8K: 8K-32K ROM 2764/27128/27256 at 8000-FFFF, 16K RAM 6264 at 4000-7FFF OEO = 0 BA17 = unused BA16 = unused BA15 = unused BA14 = A14 -> ROM 29 (27) ROMCS = !A15 -> ROM 20/22 (22/24) RAMCS = !(!A15 & A14 & CLK2) -> RAM 20/22 (can also be A15 + !A14 + !CLK2) LCO = unused *48K: 48K ROM at 4000-FFFF ROM 27512 use 7402 and wire jumpers across 7402 pins 5-19 and 6-18 or... OEO = 0 BA17 = unused BA16 = unused BA15 = A15 -> ROM 3 (1) BA14 = A14 -> ROM 29 (27) ROMCS = !A15 & !A14 -> ROM 20/22 (22/24) RAMCS = unused LCO = unused *POKEY: 8K-32K ROM 2764/27128/27256 at 8000-FFFF, POKEY at 4000-7FFF (it should be possible to wire this up with just a 7402, but it's too hard to make it socket-compatible with a 20V8, so it will require board modifications, and maybe even 7402 pins sticking out horizontally) OEO = 0 BA17 = A14 & !CLK2 -> POKEY CS1 BA16 = unused BA15 = unused BA14 = A14 -> ROM 29 (27) ROMCS = !A15 -> ROM 20/22 (22/24) RAMCS = unused LCO = unused A14 -> POKEY CS1 A15 -> POKEY !CS0 64K POKEY: 64K banked ROM 27256 at 8000-FFFF, POKEY at 4000-7FFF *128K POKEY: 128K banked ROM 27010 at 8000-FFFF, POKEY at 4000-7FFF 256K POKEY: 256K banked ROM 27020 at 8000-FFFF, POKEY at 4000-7FFF note: ROM pin 30 (28) must be jumpered for 256K OEO = A14 BA17 = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC) BA16 = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 BA15 = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 BA14 = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 ROMCS = !A15 -> ROM 20/22 RAMCS = unused LCO = (!A14 & !RW) + !A15 + !CLK2 A14 -> POKEY CS1 A15 -> POKEY !CS0 * 64K: 64K banked ROM 27512 at 8000-FFFF *128K: 128K banked ROM 27010 at 8000-FFFF 256K: 256K banked ROM 27020 at 8000-FFFF note: ROM pin 30 (28) must be jumpered for 256K OEO = A14 BA17 = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC) BA16 = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 (NC) BA15 = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 (1) BA14 = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 (27) ROMCS = !A15 -> ROM 20/22 RAMCS = unused LCO = (!A14 & !RW) + !A15 + !CLK2 * 64K/8K: 64K banked ROM 27512 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF *128K/8K: 128K banked ROM 27010 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF 256K/8K: 128K banked ROM 27020 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF use 16K RAM 6264 instead 64K/16K: 64K banked ROM 27512 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF *128K/16K: 128K banked ROM 27010 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF 256K/16K: 256K banked ROM 27020 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF note: ROM pin 30 (28) must be jumpered for 256K OEO = A14 BA17 = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC) BA16 = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 (NC) BA15 = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 (1) BA14 = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 (27) ROMCS = !A15 -> ROM 20/22 RAMCS = !(!A15 & A14 & CLK2) -> RAM 20/22 (can also be A15 + !A14 + !CLK2) LCO = (!A14 & !RW) + !A15 + !CLK2 *128K-LOW: 128K banked ROM 27010 at 8000-FFFF, bank 6 at 4000-7FFF use 144K 27010/27128 instead can also be made to work with 22V10 and re-wiring 80K: 64K banked ROM 27512 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF *144K: 128K banked ROM 27010 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF 272K: 256K banked ROM 27020 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF note: ROM pin 30 (28) must be jumpered for 272K OEO = A14 BA17 = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC) BA16 = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 BA15 = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 BA14 = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 ROMCS = !A15 -> ROM 20/22 RAMCS = A15 + !A14 -> ROM 20/22 LCO = (!A14 & !RW) + !A15 + !CLK2 256K/16K/POKEY: 256K banked ROM 27020 at 8000-FFFF, POKEY at 7FF0-7FFF, 16K RAM 6264 at 4000-7FEF requires 22V10 and re-wiring 512K: 512K banked ROM 27040 at 8000-FFFF 512K/16K: 512K banked ROM 27040 at 8000-FFFF, 16K RAM 6264 at 4000-7FFF 528K: 512K banked ROM 27040 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF requires 22V10 and re-wiring *FRACTALUS: 32K ROM at 8000-FFFF, 4K RAM at 4000-7FFF with A8 not connected start with 32K/8K, and jumper A8 of RAM to ground
2005-07-06 EDIT: updated the intro text, fixed the RAM chip 6116/6164/61256 coinfusion
This post has been edited by Bruce Tomlin: Wed Jul 6, 2005 10:43 PM

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